We note that above algebraic simplification is representing XOR (short for Exclusive-OR) and XNOR (short for Exclusive-NOR) gates. P is the result in our case for Odd Parity. The Truth Table of 4-Bit Parity Generator is:įrom K-Map, we can derive the algebraic function which is (P is the parity result): Pressing OK the files will be duly copied.Ī) Derive the Logic Circuit of 4-Bit Parity Generator In my PC it looks like as show using WinRAR (evaluation copy): Program Files->National Instruments->Circuit Design Suite 13.0->pldconfig Copy and paste the two unzipped files to the pldconfig folder in the main Multisim 13.0 install directory, by default, this should be:.Two files will be unzipped: DigilentBasys2.mspc and DigilentBasys2.ucf. Download the attached Digilent Basys 2 file.Xilinx iMPACT 13.x or later, part of the ISE WebPack (link as shown in previous line).ISE WebPACK Design Software (available here).NI Multisim 13.x Education Edition (to download an evaluation edition, please click here).Implement the Parity Generato on a Digilent Basys 2 Spartan-3E FPGA boardĭigilent Basys2 Spartan-3E FPGA Board (the board comes with an USB programming cable).Design and simulate the Parity Generator in NI Multisim 13.0.Derive the logic circuit from algebraic function obtained from Truth Table.Use a Truth Table to construct odd parity generator.The table shows the parity generator outputs for various 4-bit data words. As its name implies the operation of an Odd Parity generator is similar but it provides odd parity. modem lines) and is often included in memory systems. If a dataword is sent out with even parity, but has odd parity when it is received then the data has been corrupted and must be resent. Parity is used on communication links (e.g. By concatenating the parity bit to the dataword, a word will be formed which always has an even number of 1s i.e. If the data word contains an even number of 1s then the output of the Parity Generator will be 0. An even Parity Generator will produce a logic 1 at its output if the data word contains an odd number of 1s. There are two types of parity – even and odd.

Parity bits are extra signals which are added to a data word to enable error checking.

Vhdl program for parity generator